1. Field of the Invention
The present invention relates to photolithography techniques. More particularly, the invention relates to improved methods and apparatuses for performing optical proximity correction.
2. Description of the Related Art
The minimum feature sizes of integrated circuits (ICs) have been shrinking for years. Commensurate with this size reduction, various process limitations have made IC fabrication more difficult. One area of fabrication technology in which such limitations have appeared is photolithography.
Photolithography involves selectively exposing regions of a resist coated silicon wafer to a radiation pattern, and then developing the exposed resist in order to selectively protect regions of wafer layers (e.g., regions of substrate, polysilicon, or dielectric).
An integral component of photolithographic apparatus is a "reticle" which includes a pattern corresponding to features at one layer in an IC design. Such reticle typically includes a transparent glass plate covered with a patterned light blocking material such as chromium. The reticle is placed between a radiation source producing radiation of a pre-selected wavelength and a focusing lens which may form part of a "stepper" apparatus. Placed beneath the stepper is a resist covered silicon wafer. When the radiation from the radiation source is directed onto the reticle, light passes through the glass (regions not having chromium patterns) and projects onto the resist covered silicon wafer. In this manner, an image of the reticle is transferred to the resist.
The resist (sometimes referred to as a "photoresist") is provided as a thin layer of radiation-sensitive material that is spin-coated over the entire silicon wafer surface. The resist material is classified as either positive or negative depending on how it responds to light radiation. Positive resist, when exposed to radiation becomes more soluble and is thus more easily removed in a development process. As a result, a developed positive resist contains a resist pattern corresponding to the dark regions on the reticle. Negative resist, in contrast, becomes less soluble when exposed to radiation. Consequently, a developed negative resist contains a pattern corresponding to the transparent regions of the reticle. For simplicity, the following discussion will describe only positive resists, but it should be understood that negative resists may be substituted therefor. For further information on IC fabrication and resist development methods, reference may be made to a book entitled Integrated Circuit Fabrication Technology by David J. Elliott, McGraw Hill, 1989.
FIG. 1A shows a hypothetical reticle 100 corresponding to an IC layout pattern. For simplicity, the IC pattern consists of three rectangular design features. A clear reticle glass 110 allows radiation to project onto a resist covered silicon wafer. Three rectangular chromium regions 102, 104 and 106 on reticle glass 110 block radiation to generate an image corresponding to intended IC design features.
As light passes through the reticle, it is refracted and scattered by the chromium edges. This causes the projected image to exhibit some rounding and other optical distortion. While such effects pose relatively little difficulty in layouts with large feature sizes (e.g., layouts with critical dimensions above about 1 micron), they can not be ignored in layouts having features smaller than about 1 micron. The problems become especially pronounced in IC designs having feature sizes near the wavelength of light used in the photolithographic process.
FIG. 1B illustrates how diffraction and scattering affect an illumination pattern produced by radiation passing through reticle 100 and onto a section of silicon substrate 120. As shown, the illumination pattern contains an illuminated region 128 and three dark regions 122, 124, and 126 corresponding to chromium regions 102, 104, and 106 on reticle 100. The illuminated pattern exhibits considerable distortion, with dark regions 122, 124, and 126 having their corners rounded and their feature widths reduced. Other distortions commonly encountered in photolithography (and not illustrated here) include fusion of dense features and shifting of line segment positions. Unfortunately, any distorted illumination pattern propagates to a developed resist pattern and ultimately to IC features such as polysilicon gate regions, vias in dielectrics, etc. As a result, the IC performance is degraded or the IC becomes unusable.
To remedy this problem, a reticle correction technique known as optical proximity correction ("OPC") has been developed. Optical proximity correction involves adding dark regions to and/or subtracting dark regions from a reticle design at locations chosen to overcome the distorting effects of diffraction and scattering. Typically, OPC is performed on a digital representation of a desired IC pattern. First, the digital pattern is evaluated with software to identify regions where optical distortion will result. Then the optical proximity correction is applied to compensate for the distortion. The resulting pattern is ultimately transferred to the reticle glass.
FIG. 1C illustrates how optical proximity correction may be employed to modify the reticle design shown in FIG. 1A and thereby better provide the desired illumination pattern. As shown, a corrected reticle 140 includes three base rectangular features 142, 144, and 146 outlined in chromium on a glass plate 150. Various "corrections" have been added to these base features. Some correction takes the form of "serifs" 148a-148f and 149a-149f. Serifs are small appendage-type addition or subtraction regions typically made at corner regions on reticle designs. In the example shown in FIG. 1C, the serifs are square chromium extensions protruding beyond the corners of base rectangles 142, 144, and 146. These features have the intended effect of "sharpening" the corners of the illumination pattern on the wafer surface. In addition to serifs, the reticle 140 includes segments 151a-151d to compensate for feature thinning known to result from optical distortion.
FIG. 1D shows an illumination pattern 160 produced on a wafer surface 160 by radiation passing through the reticle 140. As shown, the illuminated region includes a light region 168 surrounding a set of dark regions 162, 164 and 166 which rather faithfully represent the intended pattern shown in FIG. 1A. Note that the illumination pattern shown in FIG. 1B of an uncorrected reticle has been greatly improved by use of an optical proximity corrected reticle.
Obviously, the degree of optical proximity correction (i.e., the size and location of correction segments) for any IC feature depends upon the desired IC feature size and the location of such feature with respect to other IC features. For example, the width of any one of segments 151a-151d may have to be increased or decreased if the width of any of the base rectangles 142, 144, and 146 is increased or decreased or if the spacing between any of these base rectangles is increased or decreased.
Today, the degree of correction necessary for a given feature is determined largely by empirical methods. That is, experiments are conducted with reticles having "test" patterns to determine the illumination pattern produced on a wafer by light shown through the test pattern. The deviation between the actual illumination pattern and the desired feature pattern is used to determine how much optical proximity correction is required for a reticle used to produce the desired feature pattern. For example, the reticle 100 of FIG. 1A may be used as a test reticle. A single experiment would show that the illumination pattern produced by reticle 100 corresponds to that shown in FIG. 1B. The rounding and thinning effects observed would lead an OPC designer to specify that when the pattern of FIG. 1A is desired, the corrections shown in FIG. 1C should be employed. Specifically, the designer would specify the width and location of segments 151a-151d and serifs 148a-148f and 149a-149f.
Of course, these particular corrections apply only to patterns having the exact size and geometry shown in FIG. 1A. If the width of or separation between the base rectangles changes (in a different IC design for example), the widths and locations of segments 151a-151d would also have to change. Thus, additional experiments with test reticles having patterns of differing feature widths and separations would be necessary to accurately determine the degree of optical proximity correction required for a changed pattern. Given the huge range of IC feature variations on even a single chip, a potentially infinite number of test reticles would have to be produced to account for every pattern that might be encountered. Luckily, for most patterns, it has been found that the degree of optical proximity correction can be estimated with good accuracy by interpolating linearly between the actual amount of correction found to be necessary for two test patterns "straddling" (in terms of sizing and/or spacing) a real feature on an IC design. Further, the degree of correction for very small patterns lying beyond a range of experimental patterns may often be predicted with good accuracy by linear extrapolation. Because these techniques require that only a relatively few test reticles be generated, many OPC systems in use today employ such linear interpolation and extrapolation techniques.
Unfortunately, it has been found that as feature sizes decrease beyond a certain critical dimension (in some cases about 0.5 microns or greater for ultra-violet radiation), the above-described linear interpolation/extrapolation techniques no longer work well. This is because the amount of correction required for a given pattern no longer varies in a linear fashion.
The non-linear effect is depicted in FIGS. 2A and 2B. FIG. 2A shows a reticle 200 having critical dimensions below a linear threshold (e.g., below about 0.5 microns or greater). When a linear optical proximity correction is performed to correct for optical distortions expected in the linear regime, the resulting illumination pattern is unacceptably distorted. Specifically, it has been observed that although serifs 228a-228f and 229a-229f and segments 251a-251d can be added to the reticle design in a manner predicted by conventional linear interpolation/extrapolation, inappropriate fusing and thinning of bars 262, 264, and 266 appear in the illumination pattern on a substrate 260 as shown in FIG. 2B.
To remedy this problem, one might suggest performing more tests in the non-linear regime and using the test results to develop a more detailed OPC protocol. However, the number of experiments required would consume too many resources to be cost effective. Thus, what is needed is an improved method and apparatus for correcting photolithography reticle design patterns having critical dimensions in the non-linear regime without requiring a great many additional experiments.